• NetBSD
• SiI SATA II

Silicon Image® SATA Ⅱ driver for NetBSD®

I got inspired to work on a driver for the SiI3124-family of SATA-Ⅱ host adapters.

siisata(4) Status

done-ish

• can read/write to ATA hard drive
• can read/write to many ATAPI CD-ROM/CD-RW drive
• man page

making progress

• hopefully error handling
• non-correctable error handling
• ATA error handling

priorities

1. polishing
2. NCQ
3. port multipliers
4. hot-swap

sisvflsh(4) Status

• supports read/write/chip-erase on 39SF series Flash devices
• bug: needs to be accessed a byte at a time for reliable placement of bytes
• needs some polish
• needs man(1) page

ataraid(4)(sii) Status

• partly working

Naming

siisata(4):

• Silicon Image (SATA Ⅱ)

sisvflsh(4):

• Silicon Image Steel Vine Flash

Documentation

• Chip documentation is now available on Silicon Image web site.
• SATA-IO wants $25 USD for a copy of the SATA spec.
• Data Sheets for the 39SF series of Flash is available.

Advanced SATA Ⅱ

• ATAPI
• Port Multipliers
• NCQ

Prior Art

• ahcisata(4)
• OpenBSD ahci(4)
  • supports NCQ

Notes

• FreeBSD driver exists, doesn't support port multipliers yet AFAICT.
• Linux sata_sil24, no in-tree port multiplier support.
• Apparently, a SATA "port" in NetBSD is the same as a PATA "channel".
• gpio driver
• flash chip programming
• flash chip reading
• I²C driver

NCQ

NetBSD already (apparently) supports something like this already with SCSI Tagged Queuing. ahcisata(4) does not yet support NCQ. I should see what the plans are. http://mail-index.netbsd.org/tech-kern/2007/07/24/0000.html

ATAPI devices are also not yet supported by ahcisata(4), again, see what plans there may be.

Port Multipliers

This is interesting, either there should be another layer of config glue (i.e. wd@satapm@atabus@siisata, wd@atabus@satapm@siisata, etc).

Or the existing 'drive' (thing) could be used to indicate the port on the multiplier, with drive 0 indicating no port multiplier, and drive 1 indicating the 1st port on the multiplier. But, would this interact well with ATAPI devices? Eh, on third thought this way seems Wrong.

....

On Nth thought, I can't really afford mid-range storage stuff at this point. Perhaps Someone Else will have the time, money and additional know-how to get started on this.

DMA mappings

structure per slot per port:

• activation prb
• table of SGTs, that, when linked together allow enough openings for (MAXPHYS/PAGE_SIZE) DMA operations (this means (64k/4k)/3 SGTs will be needed (3 useful SGEs when the SGTs are linked))

....

Actually, you don't need a linked list. you can just append SGEs after the activation PRB in host memory.